Can anyone describe what a Waveform DC shift is?

[Josh In Seattle]

Hi, I recently acquired a gently used secondhand Huntron 3200S.  I am re-reading all my old documents to try to get up to speed on more advanced signature recognition.

Reading some of the older Huntron manuals, as well as drawing from personal experience, I've seen a waveform DC shift exactly twice in my experience.   

One was on a transistor and the other was on a capacitor (both in circuit).

In both instances the waveform was not only subtly distorted but it was shifted to the left and didn't go through the origin. 

Older Huntron documentation mentions that this is very meaningful. But I've found no other description of what this means. 

Can someone please describe what it means when a signature doesn't appear in the center origin as you would expect and instead is shifted to the right or left in the display. 

And to be crystal clear, I'm not talking about an improperly adjusted display. Im describing when you are using the tracker under correct conditions and suddenly touch a component to find its signature shifts to the left or right of the origin. 

I've read just about every other military, NASA, Huntron, and other paper I can get my hands on describing signature analysis. I've never seen this phenomenon documented or explained. With the exception of the old Huntron 1000 manual. The manual has a single sentence under the memory device section that claims that you should look for this phenomenon.

Can anyone shed light on this? As it appears to be very meaningful.

[admin]

Welcome to the Huntron Users Forum.

DC offset is basically a shift in the signature position to the left or right caused by a DC voltage being present on the board. This is most commonly seen when testing a board with a battery on it such as those used for memory circuits (i.e. PC motherboard).
Thanks.

Admin

[Josh In Seattle]

Oh, OK.  For the manual reference that kind of makes sense (looking a for an internal IC short where external voltage was added, or leaked, from another path).

But that brings up a huge can of worms question.  With the 3200S, compared to the much older equipment, the manual doesn't state any tolerance for power present on the device under test.

How much power can the latest Huntron model withstand being input into its probes/channel before damage is done? As some of the older documentation claims you may troubleshoot with device power on?  I assume perhaps just for stuck/shorted IC signals.

The 3200s manual has a single reference to input protection which says 200mAPK.  Does this mean 200mA of current?  I wasn't really sure why this meant or if it was related/relevant. 

Thanks

[admin]

Good question. Looking at worst case with the Tracker set to the 10ohm range, the range resistor is rated at .75W so maximum theoretical current (square root of power divided by resistance if I remember correctly) it can handle is about 275mA. Maybe a bit more before risking damage. The Tracker protection circuitry is voltage based so if an external voltage above 20Vpk is applied through the signal line then the relays open up and you see an Overvoltage indication on the display.

The 200mAPk referenced on the front panel and in the manual refers to maximum current output from the Tracker.

[Josh In Seattle]

Ok, I understand the concept the the Huntron might tolerate some amount of line voltage but given the risk, it seems, well, too risky. I realize IC TTL-style signals are current limited, but you have to be very very sure.  Unless your power source is a small coin cell battery, I don't think I'll ever be that sure.

I think this explains the big shift in advice from the very old tracker (1000HB & 2000) manuals to the most recent 3200 manual.

Probing with active device under test power has been removed from recent advice/learning. 

I was trying to read everything to become more familiar with what could be done.  I'm still having trouble with the nuance. But I guess the older and more dangerous techniques were basically playing without a safety net and risking Huntron damage. So were phased out?

[admin]

I don't recall anything from Huntron suggesting that you can test circuitry with external power applied. Maybe the references you had in mind are referring to using the Tracker pulse generator?

[Josh In Seattle]

I thought my first question gave evidence otherwise. 

You said a DC shift is caused by external DC voltage present on the circuit. The memory (stuck bus) section of the training manual tells you to look out for a such a shift. 

What am I missing? How can I have a shift without external power, so that means the circuit has power?

What am I not putting together?  This is what started my confusion in the first place. 

[admin]

I think we are running into semantics here. I would not necessarily consider a memory battery to be external power. What we are trying to prevent is someone using a Tracker on a PCB that is powered up i.e. by wall power, power supply, etc. In such as situation damage to the Tracker can occur very quickly. DC offset is usually caused by very low power sources like on-board batteries and sometimes caps or super caps. Regarding a stuck bus shift, you will need to tell me where you see this reference so I can get some context.
Thanks.

[Josh In Seattle]

Hi,

No problem. 

Statement comes from an early tracker manual with signature examples - Huntron Tracker Operator Manual for models: 1005B-1S, 1005B-1ES, 1005B-1JS -  (Section 11.1) - Specifically 11.4 "Memories".  The last sentence of 4th paragraph was what I quoted.

I tried to attach the PDF it to this post (it's only 2.3MiB) but the forum software claims it's too big or broken or whatever, so I'm placing it on my Google drive for the time being (not forever).  Grab it while you can, it's a good read!

https://drive.google.com/file/d/1qf2eSfvAdV-V4ecmDxte5A5YWCfbC4jx/view?usp=sharing

Now before anyone starts claiming this is an obsolete tracker and not my model.  Yeah, I'm aware of that...it's also the BEST Huntron document for examples of real device signatures I've ever come across!  Much better than the scant amount in the Huntron 3200S manual or the training documents.  I highly recommend this document for anyone wanting to know what different components (like rectifiers, SCRs, etc...) actually look like on Trackers normally.

So this document off-handedly states a "stuck bus" (while powered) can be tracked for DC shift.  Please elaborate.

[admin]

Ah, I see the information you are referencing. Again, there is no reference anywhere to testing while the PCB is powered up. However, I could see some confusion when you read this bit in section 11.2, second paragraph "Be sure the other Tracker lead is connected to ground or the positive voltage supply." In this case "positive voltage supply" is referring to the voltage pin of the IC, usually called Vcc. Vcc is referenced this way several times and I can see where it may be misinterpreted.
The "dc shift" reference in the fourth paragraph of section 11.4 is simply saying that you may see a left or right shift in the signature of a failed memory pin when compared to the same pin of another memory device. This can happen when you are using a "non-bussed" pin as your COM such as a chip enable or address strobe. Again, the shift is not caused by the board being powered up.
This old manual from 1986 does have some good and still valid information on Tracker use. Another good one is the Tracker 2000 Users manual, part number 21-1052 or 21-1229. However, range selection was totally different then and the current Trackers have a lot more flexibility.
I hope this helps.
Thanks.
Admin

[Josh In Seattle]

Ok, I think I get that a non-bussed pin may have tri-state and be high impedance?  Otherwise, I don't know what property of its internal construction makes it so special to produce this affect. 

What physical phenomenon in that situation causes the DC shift?

As I've mentioned I've seen it twice before in other components and had no explanation for what was happening.  So obviously I couldn't properly use that observation to help troubleshoot what I was focused on.

Can a high-level company engineer or someone please explain why the graph shifts horizontally off the center origin?   I'm trying to understand electrically what the graph elements mean.

[admin]

We may be running into terminology differences here in what I call "DC offset" and what that old manual called "dc shift". In reading the entire section to put it into context, it appears the old 1000 manual means a difference in signature width. Since the horizontal axis of the signature represents voltage (vertical is current), a change in the width means that the breakdown voltages of the semiconductor are occurring at a different point than what is expected (when compared to a working device). You would see this type of difference if you compared two zener diodes that have different voltage ratings.
What I was referring to as DC offset is what you see when there is a real DC voltage on the board causing the whole signature to shift along the horizontal axis.

[Josh In Seattle]

Sorry, I cannot agree that width is in anyway synonymous with shift or offset to interpret this text as claiming the signature width increases. 

I agree offset and shift to be accurate terms to describe a the total movement (by horizontal offset alone) of a graph (I've only see the shift to the extreme left).  Again, since I've seen this affect, I'm not looking for interpretation of the text (I believe mine is accurate as it describes it as a shift).

My initial question wasn't about power (the replying posts brought that up, I never introduce that topic).  So please refrain from reintroducing power on the circuit unless that is the answer to my question.


May question is the still the same and oddly unchanged.  I will restate it here in somewhat different terms (paraphrase):

I have, twice, experienced a horizontal graph shift, during an in-circuit measurement of components, (once for a MOSFET and another a capacitor) on different items.  In both instances I saw a perfectly reasonable graph (cap=slight oval, Mosfet= Zener-like graph).  Except they were shifted to the extreme left.  But otherwise appeared normal.  Had they been about the origin...I'd have thought they were fine.  But the manual (referenced early) gives some special crediance to the shift affect I just described.

Can someone please describe to me what this shift affect (of an otherwise healthy-looking signature) means?  I know the horizontal axis is related to voltage...what would make all the voltage reads offset by an equal amount to shift the entire graph to no longer be about the origin?

[admin]

When you see a horizontal shift in signature position from center then there is some sort of charge level being held at that point in the circuit. It could a capacitive circuit that is holding a charge or it could be something else. In some cases, it is the Tracker that introduces the charge on the board. The amount of shift will relate to the voltage setting of the Tracker which sets the horizontal scale i.e. if the Tracker is set to 4V then you will have 1 volt/div. If you have only seen this twice then perhaps you can look closer at the circuit you were testing and you tell us.

[jvthorsley]

Not sure if this is the problem being discussed here.
The attached sketch shows in blue a stored signature .
Rescan and because of capacitive charge shows a shift to the right, and if this deviates beyond that set,  the test fails.
Highlight the failed signature, go into "real time",   and because of capacitor charge the trace moves to the far right.
The circuit is good, its just the instance when the signature is measured in the middle of a charging capacitor / diode circuit that can result in inconsistent results.
Or am I talking nonsense?
I use a ProTrack + Scanner + Workstation 4.3.